| School/Faculty/Institute | Faculty of Engineering | ||||
| Course Code | EE 305 | ||||
| Course Title in English | Digital Electronics | ||||
| Course Title in Turkish | Sayısal Elektronik | ||||
| Language of Instruction | EN | ||||
| Type of Course | Flipped Classroom,Laboratory Work | ||||
| Level of Course | Introductory | ||||
| Semester | Fall | ||||
| Contact Hours per Week |
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| Estimated Student Workload | 180 hours per semester | ||||
| Number of Credits | 7 ECTS | ||||
| Grading Mode | Standard Letter Grade | ||||
| Pre-requisites |
EE 206 - Analysis of Microelectronic Circuits and Devices |
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| Co-requisites | None | ||||
| Expected Prior Knowledge | Prior knowledge in ordinary differential equations, MOSFET, analysis of microelectronic circuits, SPICE, MATLAB, and gate level knowledge in combinational and sequential logic circuits is expected. | ||||
| Registration Restrictions | Only Undergraduate Students | ||||
| Overall Educational Objective | To learn the basics of digital electronic, behavior of logic gates, analyze and synthesize combinational and sequential circuits, memory circuits, and to have an idea of VLSI circuits and data converters. | ||||
| Course Description | This course provides a comprehensive understanding of digital electronics. The following topics are covered: MOS and CMOS logic gates, inverters, input and output circuits, negative AND - NAND and negative OR - NOR gates, static and dynamic analysis; Regenerative circuits, unstable, monostable, bistable trigger circuit and the Schmitt trigger; Very Large Scale Integrated Circuits (VLSI), volatile and non-volatile memory: DRAM, SRAM, ROM, PROM; Digital / analog and analog / digital converters. |
Course Learning Outcomes and CompetencesUpon successful completion of the course, the learner is expected to be able to:1) eviriciler, mantık kapıları, latch'ler, kaydediciler, bellek yapıları ve veri dönüştürücülerin çalışma prensiplerini kavrar; 2) CMOS dijital devrelerin statik ve dinamik davranışlarını analiz eder; 3) temel dijital devreleri sentezler, laboratuvarda kurar ve ölçümlerle doğrular; 4) ekipler halinde dijital elektronik deneyleri yapar; 5) yeni nesil CMOS teknolojileri kapsamında simülasyon ve deneysel verileri tartışır. |
| Program Learning Outcomes/Course Learning Outcomes | 1 | 2 | 3 | 4 | 5 |
|---|
| N None | S Supportive | H Highly Related |
| Program Outcomes and Competences | Level | Assessed by |
| Prepared by and Date | TUBA AYHAN , June 2019 |
| Course Coordinator | TUBA AYHAN |
| Semester | Fall |
| Name of Instructor | Dr. Öğr. Üyesi TUBA AYHAN |
| Hafta | Konu |
| 1) | Dijital elektroniğe giriş, temel bilgiler: mantık devre aileleri ve karakterizasyonu |
| 2) | Direnç yüklemeli invertör devreleri, MOSFET yüklü invertörler |
| 3) | CMOS invertör devreleri ve DC karakteristikleri |
| 4) | İnvertör anahtarlama özellikleri ve güç tüketimi |
| 5) | Mantık kapılarının statik analizi: NAND ve NOR kapılarının DC karakteristikleri ve geçici analizi |
| 6) | Mantık kapılarının statik analizi: gecikme süresi |
| 7) | İletim kapıları ve mantık kapılarında güç tüketimi |
| 8) | Kombinasyonel devre tasarımı. Örnek: toplama devreleri |
| 9) | Ardışık devrelere giriş: yenileyici devreler, kararsız ve monostabil tetikleyici devreler |
| 10) | SR latch, saatli SR latch, master-slave flip-flop |
| 11) | D-latch ve kenar tetiklemeli flip-flop |
| 12) | VLSI devrelerine giriş: dinamik mantık devreleri |
| 13) | Yarı iletken bellekler (uçucu ve uçucu olmayan bellekler) |
| 14) | Veri dönüştürücüler |
| 15) | Final sınavı/proje/sunum dönemi |
| 16) | Final sınavı/proje/sunum dönemi |
| Required/Recommended Readings | Kang S., Leblebici Y., Kim C. “CMOS digital integrated circuits: analysis and design”, McGraw-Hill Education, 2015 Sedra, A. S., Smith, K.C “Microelectronic Circuits”, Oxford University Press fifth edition, 2004 ıs required only for data converters, week 14. (Ch. 9.7,9.8,9.9) Suggested readings: Uyemura, John P “CMOS Logic Circuit Design”, Kluwer Academic Publishers, 2001 (Ch. 3- 7) Rabaey Jan M., Chandrakasan, A., Nikolic B., “Digital Integrated Circuits”, Prentice-Hall Second Edition, 2003 (Ch. 1,5,6,7,8,12) Sedra, A. S., Smith, K.C “Microelectronic Circuits”, Oxford University Press fifth edition, 2004 (Ch. 4, 10, 11) | |||||||||||||||||||||
| Teaching Methods | Contact hours using “Flipped Classroom” as an active learning technique. | |||||||||||||||||||||
| Homework and Projects | There will be 5 homework assignments with these topics: 1. CMOS inverter, 2. Combinational logic structures, 3. Sequential logic gates, 4. Memories and array structures, and data converters. Students are evaluated by their in-lab performance and reports. | |||||||||||||||||||||
| Laboratory Work | Students will carry out 7 experiments on the following topics: characterization of resistive-load inverter, characterization of CMOS inverter, static characteristics of basic CMOS gates, dynamic characteristics of basic CMOS gates, CMOS sequential circuits, power in digital circuits and basics of VLSI circuits. | |||||||||||||||||||||
| Computer Use | At least one of the homework is based on SPICE Simulations on computer. | |||||||||||||||||||||
| Other Activities | None | |||||||||||||||||||||
| Assessment Methods |
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| Course Administration |
Instructor’s office and phone number: 5th Floor office hours: Wed. 14:30 – 18:00 (unless coincides with lab hour) email address: ayhant@mef.edu.tr Policies: • Missing an exam: Provided that proper documents of excuse are presented, a make-up exam will be given for the missed midterm. • Homework are due 1-2 weeks after it is announced. Late homeworks will be downgraded by 10% for each day passed the due date. • Exams are in open-notes and open-books format, oral examination with written preparation. • Student is required to score each of these 5 assessment type. Lower limit to pass the course is o Ultimate score: 30 (out of 100) in weighted average; o Exams: 20 (out of 50) in the exam average, o Lab: Attendance (at least 6 out of 7), o Homework and flipped exercises: 10 (out of 25), o Final project: submission required. • A reminder of proper classroom behavior, code of student conduct: YÖK Regulations Academic Dishonesty and Plagiarism: YÖK Regulations |
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| Activity | No/Weeks | Hours | Calculation | ||||
| No/Weeks per Semester | Preparing for the Activity | Spent in the Activity Itself | Completing the Activity Requirements | ||||
| Ders Saati | 14 | 2 | 3 | 70 | |||
| Laboratuvar | 7 | 1 | 2 | 2 | 35 | ||
| Proje | 1 | 10 | 1 | 11 | |||
| Ödevler | 3 | 2 | 3 | 15 | |||
| Küçük Sınavlar | 5 | 1 | 5 | ||||
| Ara Sınavlar | 2 | 20 | 2 | 44 | |||
| Total Workload | 180 | ||||||
| Total Workload/25 | 7.2 | ||||||
| ECTS | 7 | ||||||